KV Kirk Ventura
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Digital Design / Computer Architecture

RISC-V & FPGA Chip Design

A bottom-up path from small Verilog modules and testbenches to FPGA prototypes and a custom RISC-V management processor.

Focus RTL + Architecture
Tools Verilog · Vivado · GTKWave
Status Active Learning

Learning digital design from the bottom up

This project starts with intentionally small RTL blocks—counters, registers, combinational logic, state machines, and testbenches—before combining those fundamentals into a processor architecture.

Custom mechanical keyboard PCB and enclosure

Long-term architecture

The larger goal is a custom RISC-V-based management processor developed through Verilog, assembly programs, simulation, FPGA verification, and progressively more complete CPU subsystems. This project is also my bridge into deeper computer architecture topics such as pipelines, memory systems, buses, instruction sets, and SoC design.

Next project Cyberdeck → Custom Phone →